In order to deal with requirements for a recent high-density trend of a semiconductor chip (LSI) and readily deal with requirements for partial specification changes, a three-dimensional semiconductor chip module in which plural semiconductor chips have been stacked, integrated, and electrically interconnected has been proposed.
In conventional three-dimensional semiconductor chip modules, since plural semiconductor chips are stacked, heat generated by power consumption at the time of operations is easy to accumulate inside, and heat dissipation is a more serious task than in the case of single semiconductor chips. Non-Patent Document 1 describes heat dissipation by providing a semiconductor chip board with a fluidic channel extending inside the board from a face (upper face or lower face) on which no semiconductor pattern is provided to a side face.
Non-Patent Document 1: Muhannad S. Bakir, James D. Meindl, “Fully Compatible Low Cost Electrical, Optical, and Fluidic I/O Interconnect Networks for Ultimate Performance 3D Gigascale Systems”, 3D-SIC 2007, pp. 13-1˜13-21, March, 2007